The Hexa-X-II Project has released its latest research deliverable, D5.5, advancing the field of 6G technology with a comprehensive analysis and validation of key technological enablers, from devices to supporting infrastructure. This is the final report from Work Package 5 (WP5), and as such, it builds upon earlier project findings, especially deliverables D5.2 and D5.3, presenting updated insights and solutions.
Exploring 6G device classes
6G device classes are updated, incorporating the impact of new use cases and sensing capabilities, and disclosing enabling technologies. The analysis provides a framework for addressing the diverse application needs of 6G, emphasizing energy consumption, reliability, data rate, and sustainability as core principles.
Advancing 6G transceiver designs
Critical 6G transceiver technologies in FR1, FR2, FR3, and sub-THz bands are discussed. Challenges such as power amplifier non-linearity, electromagnetic field compliance, and the role of reconfigurable intelligent surfaces and network-controlled repeaters are addressed for FR1, FR2, and FR3 transceivers, which are deemed crucial in supporting legacy applications and enabling the transition to 6G. Meanwhile, sub-THz transceiver discussions revolve around high-frequency wideband transceiver components, resonant tunnelling diodes, and hardware non-idealities. Solutions are presented to address issues like phase noise, including delayed carrier frequency delivery to individual antennas and similar approaches for the receiver side, while the use of irregular antenna arrays is proposed to simplify chip-to-antenna routing at very high frequencies. The dominance of analogue over digital power consumption is also investigated.
Designing secure, scalable, and energy-efficient SoCs for 6G
Advanced system-on-chip (SoC) technologies are crucial to realize compact and energy-efficient 6G devices. In this regard, secure and scalable SoC architectures for 6G applications, emphasizing the integration of AI and signal processing accelerators, are designed. Accelerator architectures are evaluated for performance and energy efficiency on PHY benchmarks, then integrated into secure SoCs with operating system support. A chip prototype verifies compatibility and functionality. The architecture also emphasizes trust and security in both hardware and software, ensuring data protection and system resilience for 6G devices.
Pioneering ultra-low-power/cost 6G IoT devices
Battery-operated and energy-neutral IoT devices require novel design, manufacturing, and operational approaches to sustainably achieve very low power consumption and cost. Advances in device architecture and communication protocols are presented for ultra-low-cost/power 6G Internet of Things (IoT) scenarios, focusing on deployment and air-interface design trade-offs. Innovative approaches include printed electronics for scalable device production, multi-source energy harvesting, efficient energy management, lightweight communication protocols, RF wireless power transfer, and adaptive intelligence. By integrating these energy-harvesting efficient mechanisms with optimized protocols, the solutions tame the stringent requirements of emerging 6G IoT use cases.
Showcasing real-world feasibility through innovative PoCs
Two PoC frameworks demonstrate the practical applicability of key WP5 innovations. They include zero-energy devices harnessing ambient backscatter communication to support indoor localization services, as well as scalable XR services optimized for low power consumption. Each PoC highlights specific design trade-offs, performance metrics, and deployment considerations, illustrating feasibility in real-world scenarios.
For a more detailed exploration, please read the full deliverable and check out the accompanying presentation.